Experience
1 year
Teachings
VLSI System Design
Education
PhD - National Institute of Technology Meghalaya
M.Tech - Biju Patnaik University of Technology
Contact Address :
Dept. of ECE
National Institute of Technology Sikkim
Barfung, Ravangla Sub-Division
South Sikkim - 737139
Journals:
1. S. Mishra, T. V. Mahendra, J. Saikia, and A. Dandapat, A low-overhead dynamic TCAM with pipelined read-restore refresh scheme, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 5, pp. 1591-1601, May 2018.
2. S. Mishra and A. Dandapat, Energy-efficient adaptive match-line controller for large-scale associative storage, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 6, pp. 710-714, Jun. 2017.
3. S. Mishra, T. V. Mahendra, and A. Dandapat, A 9-T 833-MHz 1.72-fJ/bit/search quasi static ternary fully associative cache tag with selective matchline evaluation for wire speed applications, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 11, pp. 1910-1920, Nov. 2016.
4. S. Mishra and A. Dandapat, EMDBAM: A low power dual bit associative memory with match error and mask control, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 6, pp. 2142-2151, Jun. 2016.
5. T. V. Mahendra, S. W. Hussain, S. Mishra, and A. Dandapat, Precharge free dynamic content addressable memory, Electronics Letters, vol. 54, no. 9, pp. 556-558, May 2018.
6. T. V. Mahendra, S. Mishra, and A. Dandapat, Self controlled high performance pre-charge free content addressable memory, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 8, pp. 2388-2392, Aug. 2017.
Conferences:
1. F. Begum, S. Mishra, M. N. Islam and A. Dandapat, Analysis and proposal of a flash subranging ADC architecture, in International Conference on Microelectronics, Computing & Communication Systems, 2018, Ranchi, pp. 1-4.
2. V. M. Tripathi, S. Mishra, J. Saikia, and A. Dandapat, A low-voltage 13T latch-type sense amplifier with regenerative feedback for ultra speed memory access, in 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID), 2017, Hyderabad, pp. 341-346.
3. J. Saikia, S. Mishra, and A. Dandapat, Large Scale Dynamic Content Addressable Memory with Hybrid Matchline Structure, in Students' Technology Symposium (TechSym), 2016, Kharagpur, pp. 1-1.
4. S. Mishra and M. J. M. Rao, Telematics based security systems, in proceeding of Advanced Trends in Computer and Information Technology Conference, 2013, Sambalpur, pp. 97-101.